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Implementing a simple continuous speech recognition system on an FPGA

Melnikoff, Stephen Jonathan and Quigley, Steven Francis and Russell, Martin (2002) Implementing a simple continuous speech recognition system on an FPGA. In: Field-Programmable Custom Computing Machines, 2002. Proceedings. 10th Annual IEEE Symposium on FPGAs for Custom Computing Machines (FCCM 2002). IEEE, pp. 275-276.

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URL of Published Version: http://ieeexplore.ieee.org/iel5/8168/24313/01106682.pdf?isnumber=24313&prod=STD&arnumber=1106682&arnumber=1106682&arSt=+275&ared=+276&arAuthor=Melnikoff%2C+S.J.%3B+Quigley%2C+S.F.%3B+Russell%2C+M.J.

Speech recognition is a computationally demanding task, particularly the stage which uses Viterbi decoding for converting pre-processed speech data into words or sub-word units. We present an FPGA implementations of the decoder based on continuous hidden Markov models (HMMs) representing monophones, and demonstrate that it can process speech 75 times real time, using 45% of the slices of a Xilinx Virtex XCV1000

Type of Work:Book Section
Date:2002 (Publication)
School/Faculty:Schools (1998 to 2008) > School of Engineering
Department:Electronic, Electrical and Computer Engineering
Additional Information:

©2002 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.

Subjects:TK Electrical engineering. Electronics Nuclear engineering
QA75 Electronic computers. Computer science
Institution:University of Birmingham
Copyright Holders:IEEE
ID Code:28
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